`timescale	1ps/1ps
module s8_gray_light(
		input	wire		resetb,
		input	wire		sclk,

		input	wire		set_d_ok,
		input	wire	[15:0]	set_addr,
		input	wire	[7:0]	set_data,
		
		input   wire            local_picture_en,
		input   wire    [7:0]   unit_type,
		input   wire    [1:0]   pixel_mode,
		output  reg     [7:0]	unit_pixel_w_max,
		output  reg     [7:0]   RVport_mode,
		input   wire            mode_port_free, 
		input   wire            empty_right,   
		input   wire            empty_down,
		input   wire            port_20_en,
		input   wire            port_24_en,	
		input   wire            data_inv_en,
		output  reg     [7:0]   correct_type,
		
		input   wire    [10:0]  l_total_reg,
		input   wire    [10:0]  h_total_reg,    
				
		input	wire	[7:0]	state,

		input	wire		v_start,
		input	wire		hsin,
		input	wire	[7:0]	din,
		input	wire	[8:0]	h_num,

		output	reg		adj_h_start,
		output  reg             adj_rd_start2,
		output  reg     [8:0]   adj_h_num,
		input	wire		adj_read_end,
		output	reg	[9:0]	adjust_addr,
		input	wire	[47:0]	adjust_data,
	
		output	reg	[1:0]	unit_color_addr,
		input	wire	[15:0]	unit_color_adj,
		
		output	reg		hsout,
		output	reg	[15:0]	dout,
		output  reg             h_start,
		output  reg             h_end,
		output	reg	[8:0]	h_num_out,
		output	reg	[5:0]	cycle_max,
		output  reg     [8:0]   l_total_reg_out,
		output  reg             cc_96_16,
		output  reg             cc_128_16,
		output  reg             cc_256_16,
		output  reg             lc_256_8,
		
		input	wire	[10:0]	info_addr,
		output	wire	[7:0]	info_data,
		
		output	wire	[15:0]	tout
		);

//******************************************************************/
//			   信号定义
//******************************************************************/
reg		dis_buf_we;
reg	[11:0]	dis_buf_waddr,dis_buf_raddr;
wire	[7:0]	dis_buf_wdata,dis_buf_rdata;
reg		table_wea;
reg	[10:0]	table_addra;
reg	[9:0]	table_addrb;
wire	[7:0]	table_dina,table_douta;
wire	[15:0]	table_doutb;

reg	[8:0]	dot_color_adj_temp;
wire	[15:0]	dot_color_adj;
reg     [15:0]  unit_color_light,dot_color_light;
wire	[31:0]	dot_color_result,unit_color_result;
wire	[17:0]	unit_pixel_base;

reg     [15:0]  max_light;
reg     [9:0]   box_l_pixel,box_h_pixel;
reg     [7:0]   box_empty_h;
reg	[7:0]	led_set;
reg             p_ex_flag;
reg		correct_en;
wire		d_clock_en,l_mode,left_in,down_in;
wire		vir4_pixel,color2_pixel,vir_disp,vir_mode;
wire            dot_adj_frame;

wire		hs_vir,ds_vir;
wire	[7:0]	data_vir;

reg	[1:0]	w_color_count,r_color_count,r_color_addr,r_color_addr_t,color_sel;
reg	[10:0]	w_addr_h,pixel_addr,unit_empty_l;
reg     [7:0]   box_empty_l;
reg     [7:0]   pixel_addr_r,pixel_addr_r1;
reg	[7:0]	base_max,w_pixel_count,r_base_count;
reg     [6:0]   w_unit_count,r_cycle_count,cycle_last;
reg	[7:0]	unit_num,pixel_offset,pixel_offset_t;
wire	[8:0]	unit_pixel_width;
reg		w_color_end,w_unit_last_pixel,r_color_end,r_base_end,r_cycle_end;
reg		hsin_t,ds_a,h_out_en,h_out_end,color_end;
reg	[1:0]	color_sel_a,color_sel_b;
reg	[7:0]	hs_info_h,hs_info_l;
reg	[15:0]	hs_shift;
reg             adj_buf_w_end_flag,h_buf_w_end_flag;	
reg     [4:0]   lmode_r_port_count; 
reg             port_en_flag;

reg     [1:0]   color_sel_r,color_sel_r1,color_sel_r2,color_sel_r3,color_sel_r4,color_sel_r5,color_sel_r6,color_sel_r7;
reg     [47:0]  adjust_data_r;
wire    [15:0]  Kr,Kg,Kb; 
reg     [15:0]  dR,dG,R,G,B;
wire    [31:0]  R1,G1,B1;
reg     [18:0]  dout_c;
reg     [17:0]  dout_d;
reg             adj_rd_mask;
wire            light_adj_mode;
reg             cc_256_16_pre_128p;
wire            correct_enable,l_num_128_en;
reg             hsout_r;
reg     [15:0]  unit_color_data;
wire            color_restore;
reg		hout_st_temp,d_start;
reg	[11:0]	start_shift;
wire	[7:0]	gray_data;
reg     [7:0]   gray_data_d1,gray_temp,gray_max,gray_max_temp,gray_max_dd,gray_max_d1,gray_max_d2,gray_max_d3,gray_max_d4,gray_max_d5,gray_max_d6;
wire	[15:0]	gamma_light;
wire	[31:0]	gamma_result;
reg             gamma_wen;
reg     [15:0]  gamma_adj;
reg		color_restore_en;
wire		color_restore_enable;
//******************************************************************/
//			   功能模块
//******************************************************************/
//**********************虚拟处理*****************************/
vir_cnt803_v6 vir_cnt803(
		.resetb(resetb),
		.sclk(sclk),
		
		.vir_mode(vir_mode),
		.led_set(led_set),
		
		.v_start(v_start),
		.hsin(hsin),
		.din(din),
		
		.hsout(hs_vir),
		.dsout(ds_vir),
		.dout(data_vir),
		
		.tout()
		);

//测试用

//assign	hs_vir=hsin;
//assign	ds_vir=hsin;
//assign	data_vir=din;

//**********************行缓冲*****************************/
//显示数据缓冲
/*swsr_2kw8_2kr8_dp	dis_data_buf(
		.clka	(sclk),
		.wea	(dis_buf_we),
		.addra	(dis_buf_waddr),
		.dina	(dis_buf_wdata),
		.clkb	(sclk),
		.addrb	(dis_buf_raddr),
		.doutb	(dis_buf_rdata)
		);	*/
swsr_4kw8_4kr8_dp	dis_data_buf(
	.wrclock ( sclk ),
	.wren ( dis_buf_we ),
	.wraddress ( dis_buf_waddr ),
	.data ( dis_buf_wdata ),
	.rdclock ( sclk ),
	.rdaddress ( dis_buf_raddr ),
	.q ( dis_buf_rdata )
	);
//**********************灰度&行映射表*****************************/
swsr_2kw8_1kr16_tdp data_rec_table(
	.clock_a ( sclk ),
	.wren_a ( table_wea ),
	.address_a ( table_addra ),
	.data_a ( table_dina ),
	.q_a ( table_douta ),
	
	.clock_b ( sclk ),
	.wren_b ( 'd0 ),
	.address_b ( {2'b00, gray_max}  ),
	.data_b ( 'd0 ),
	.q_b ( table_doutb )
	);
//**********************亮度调整乘法器*****************************/
//Gamma=2调整
swsr_1K8i_512B16o gamma_buf(
	.data(set_data),
	.rdaddress({color_restore,gray_data}),
	.rdclock(sclk),
	.wraddress(set_addr[9:0]),
	.wrclock(sclk),
	.wren(gamma_wen),
	.q(gamma_light));
	
//全局分色
mult_16_16_sync  unit_color_mult(
	.clock(sclk),
	.dataa(unit_color_adj), 
	.datab(unit_color_light), 	
	.result(unit_color_result)); 

always@(posedge sclk)
        if(color_restore==0)
                gamma_adj=16'h0100;
        else
                gamma_adj=table_doutb;

//亮度变换
mult_16_16_sync	gammax_change (
	.clock ( sclk ),
	.dataa ( gamma_adj ),
	.datab ( unit_color_data ),
	.result ( gamma_result )
	);	
//**********************缓冲地址计算乘法器*****************************/
//地址计算

assign	unit_pixel_width=unit_pixel_w_max+1;

mult_9X9_sync  addr_mult(
	.clock(sclk),
	.dataa({unit_pixel_width}),  
	.datab({2'h0,unit_num}), 
	.result(unit_pixel_base)); 

//***********************************************************/
//			参数设置
//***********************************************************/
always	@(posedge sclk or negedge resetb)
	if (resetb==0)
		begin
		        box_l_pixel<=128;
		        box_h_pixel<=128;
			unit_pixel_w_max<=31;
			led_set<=8'b00_10_01_00;
			correct_en<=0;
			max_light<=16'hFFFF;
			correct_type<=0;
			color_restore_en<=0;
			RVport_mode<=0;
		end
	else if (set_d_ok==1)
		case (set_addr)
		        16'h101c:       box_l_pixel[7:0]<=set_data;
		        16'h101d:       box_l_pixel[8]<=set_data[0]; 
		        16'h101e:       box_h_pixel[7:0]<=set_data;
		        16'h101f:       box_h_pixel[8]<=set_data[0];     
			16'h1020:	unit_pixel_w_max<=set_data;
			16'h1032:       color_restore_en<=set_data[0];
			16'h1042:	led_set<=set_data;
			16'h1044:       RVport_mode<=set_data;
			16'h1051:       p_ex_flag<=set_data[5];				
			16'h41FE:	max_light[7:0]<=set_data[7:0];
			16'h41FF:	max_light[15:8]<=set_data[7:0];
			16'h6000:	correct_en<=set_data[0];
			16'h6001:       correct_type<=set_data;
				
		endcase
		
assign	vir4_pixel=pixel_mode[0];
assign	color2_pixel=pixel_mode[1];
assign	l_mode=unit_type[1];
assign	d_clock_en=unit_type[2];
assign	left_in=unit_type[5]&(~unit_type[1]);
assign	down_in=unit_type[5]&unit_type[1];

assign	vir_disp=state[7];
assign  dot_adj_frame=state[4];
assign  color_restore_enable=state[1];
assign	color_restore=(color_restore_enable&color_restore_en);
assign	vir_mode=vir4_pixel&vir_disp;
assign  correct_enable=(correct_en&dot_adj_frame)|local_picture_en;
assign  light_adj_mode=lc_256_8|local_picture_en;

always	@(posedge sclk)  
        if(correct_type==8'h11)
                cc_96_16<=1;
        else
                cc_96_16<=0;

always	@(posedge sclk)  
        if(correct_type==8'h12)
                cc_128_16<=1;
        else
                cc_128_16<=0;
                
always	@(posedge sclk)  
        if(correct_type==8'h13)
                cc_256_16<=1;
        else
                cc_256_16<=0;

always	@(posedge sclk)  
        if(correct_type==8'h03 || correct_type==8'h00)
                lc_256_8<=1;
        else
                lc_256_8<=0;
                                
//*********************data_rec_table写************************/
always	@(posedge sclk)
	if (set_d_ok==1 && (set_addr[15:8]==8'h44 || set_addr[15:8]==8'h45))
		table_wea<=1;
	else if (set_d_ok==1 && (set_addr[15:8]>=8'h50 &&  set_addr[15:8]<=8'h53))
		table_wea<=1;
	else if (set_d_ok==1 && set_addr[15:8]==8'h58)
		table_wea<=1;
	else
		table_wea<=0;

always	@*
	if (table_wea==0)
		table_addra<=info_addr;
	else if (set_addr[12]==0)
		table_addra<={2'h0,set_addr[8:0]};
	else if (set_addr[11]==0)
		table_addra<={1'h1,set_addr[9:0]};
	else
		table_addra<={2'h1,set_addr[8:0]};

assign	table_dina=set_data;
assign	info_data=table_douta;

always	@(posedge sclk)
	if (set_d_ok==1 && (set_addr[15:8]==8'h42 || set_addr[15:8]==8'h43))   //gamma 2 table
		gamma_wen<=1;
	else if(set_d_ok==1 && (set_addr[15:8]==8'h40 || set_addr[15:8]==8'h41))        //LED gamma table
	        gamma_wen<=1;
	else
	        gamma_wen<=0;
//***********************************************************/
//			行缓冲写控制
//***********************************************************/
//*************输入行起始检测***********

always @(posedge sclk)
	hsin_t<=hs_vir;

//****************写计数****************
always @(posedge sclk)
	if (hs_vir==0)
		w_color_count<=0;
	else if (ds_vir==1) begin
		if (w_color_end==1)
			w_color_count<=0;
		else
			w_color_count<=w_color_count+1;
		end

always @*
	if (ds_vir==0)
		w_color_end<=0;
	else if (w_color_count==3)
		w_color_end<=1;
	else if (vir_mode==0 && w_color_count==2)
		w_color_end<=1;
	else
		w_color_end<=0;

always @(posedge sclk)
        if((mode_port_free==1'b0 && left_in==1'b0) || (mode_port_free==1'b1 && empty_right==1'b0))
		box_empty_l<=box_l_pixel-l_total_reg[8:0];	
	else		
		box_empty_l<=8'h0;

always @(posedge sclk)
        if(v_start==1'b1)
                unit_empty_l<=box_empty_l;
        else if(unit_empty_l>=unit_pixel_width)
		unit_empty_l<=unit_empty_l-unit_pixel_width;	
						
always @(posedge sclk)
	if (hs_vir==0)
	        w_addr_h<=unit_empty_l;
	else if (w_color_end==1)
		w_addr_h<=w_addr_h+1;

//****************缓冲写信号**********
assign	dis_buf_wdata=data_vir;

always @*
	if (color2_pixel==1)
		dis_buf_waddr<={w_addr_h[9:0],w_addr_h[10],w_color_count[0]};
	else
		dis_buf_waddr<={w_addr_h[9:0],w_color_count[1:0]};
	
always @*
	if (ds_vir==0)
		dis_buf_we<=0;
	else if (color2_pixel==1 && w_color_count==2)
		dis_buf_we<=0;
	else
		dis_buf_we<=1;
	               
//***********************************************************/
//			数据长度计数
//***********************************************************/
always @(posedge sclk)
	if (hs_vir==0)
		w_pixel_count<=0;
	else if (w_color_end==1) begin
		if (w_unit_last_pixel==1)
			w_pixel_count<=0;
		else
			w_pixel_count<=w_pixel_count+1;
		end

always @(posedge sclk)
	if (w_pixel_count==unit_pixel_w_max)
		w_unit_last_pixel<=1;
	else
		w_unit_last_pixel<=0;

always @(posedge sclk)
	if (hs_vir==0)
		w_unit_count<=0;
	else if (w_color_end==1 && w_unit_last_pixel==1)
		w_unit_count<=w_unit_count+1;
		
//***********************************************************/
//			读逐点调整数据控制
//***********************************************************/		
always @(posedge sclk)
	if (correct_enable==1'b1 && hsin_t==0 && hs_vir==1 && state[2]==0)
		adj_h_start<=1;
	else
		adj_h_start<=0;

always @(posedge sclk)
        l_total_reg_out<=l_total_reg-1;

assign  l_num_128_en=l_total_reg_out[7];

always @(posedge sclk)
	if (adj_h_start==1)
	        adj_rd_mask<=1;
        else if(correct_enable==1'b1 && l_num_128_en==1 && adjust_addr==509)	        		
                adj_rd_mask<=0;	

always @(posedge sclk)
        if(correct_enable==1'b1 && l_num_128_en==1 && adj_rd_mask==1 && adjust_addr==509 && cc_256_16==1 && light_adj_mode==0)
                adj_rd_start2<=1;
        else
                adj_rd_start2<=0;               
                		
//***********************************************************/
//			输出信号时序控制
//***********************************************************/
//****************输出控制****************
always @(posedge sclk)
	if (hsin_t==1 && hs_vir==0)
	        h_buf_w_end_flag<=1'b1;
	else if(hsin_t==0 && hs_vir==1)
	        h_buf_w_end_flag<=1'b0; 

always @(posedge sclk)
	if ((adj_read_end==1 && correct_enable==1) || (hsin_t==0 && hs_vir==1 && correct_enable==0))
	        adj_buf_w_end_flag<=1'b1;
	else if(h_out_en==1'b1)
	        adj_buf_w_end_flag<=1'b0;  
	        
always@(posedge sclk or negedge resetb)
	if (resetb==0)
		h_out_en<=0;
	else if (adj_buf_w_end_flag==1'b1 && h_buf_w_end_flag==1'b1)
		h_out_en<=1;
	else if (h_out_end==1)
		h_out_en<=0;
        
//****************输出长度控制****************
always @(posedge sclk)
	if (h_out_en==0)
		r_color_count<=0;
	else if (r_color_end==1)
		r_color_count<=0;
	else 
		r_color_count<=r_color_count+1;

always @(posedge sclk)
	if (h_out_en==0)
		r_color_end<=0;
	else if (color2_pixel==1 && r_color_count==0)
		r_color_end<=1;
	else if (vir_mode==0 && color2_pixel==0 &&  r_color_count==1)
		r_color_end<=1;
	else if (vir_mode==1 && r_color_count==2)
		r_color_end<=1;
	else
		r_color_end<=0;

always @(posedge sclk)
	if (hsin_t==0 && hs_vir==1)
		r_base_count<=0;
	else if (l_mode==0 && r_color_end==1 && r_base_end==1)
		r_base_count<=0;		
	else if (h_out_en==1 && l_mode==0 && r_color_end==1)
		r_base_count<=r_base_count+1;
	else if (h_out_en==1 && l_mode==1 && r_color_end==1 && r_cycle_end==1)
		r_base_count<=r_base_count+1;

always @(posedge sclk)
	if (l_mode==1)
		base_max<=unit_pixel_w_max;
	else if (color2_pixel==0)
		base_max<={unit_pixel_w_max[7:3],3'b111};
	else
		base_max<={unit_pixel_w_max[7:4],4'b1111};

always @(posedge sclk)
	if (h_out_en==0)
		r_base_end<=0;
	else if (r_base_count==base_max)
		r_base_end<=1;
	else
		r_base_end<=0;

always @(posedge sclk)
	if (hsin_t==0 && hs_vir==1)
		r_cycle_count<=0;
	else if (l_mode==1 && r_color_end==1 && r_cycle_end==1)
		r_cycle_count<=0;		
	else if (h_out_en==1 && l_mode==1 && r_color_end==1)
		r_cycle_count<=r_cycle_count+1;
	else if (h_out_en==1 && l_mode==0 && r_color_end==1 && r_base_end==1)
		r_cycle_count<=r_cycle_count+1;

always @*
        if(l_mode==1) begin
                if((r_cycle_count[1:0]<3 && port_24_en==1)||(r_cycle_count[1:0]<3 && r_cycle_count[3:0]<13 && port_20_en==1))
                        port_en_flag<=1'b1;  
                else
                        port_en_flag<=1'b0;
                end
                        
always @(posedge sclk)
	if (h_out_en==0)
		lmode_r_port_count<=0;
	else if (l_mode==1 && r_color_end==1 && r_cycle_end==1)
		lmode_r_port_count<=0;		
	else if (l_mode==1 && r_color_end==1 && port_en_flag==1)
	        lmode_r_port_count<=lmode_r_port_count+1;

always @(posedge sclk)
	if (hs_vir==0 && hsin_t==1) begin
	        if((port_20_en==1 || port_24_en==1) && l_mode==1)
	                cycle_last<=5'h1F; 
	        else
		        cycle_last<=w_unit_count-w_unit_last_pixel;
                end

always @(posedge sclk)
	if (l_mode==0)
		cycle_max<=cycle_last;
	else if (color2_pixel==0)
		cycle_max<={cycle_last[6:3],3'b111};
	else
		cycle_max<={cycle_last[6:4],4'b1111};

always @(posedge sclk)
	if (h_out_en==0)
		r_cycle_end<=0;
	else if (r_cycle_count==cycle_max)
		r_cycle_end<=1;
	else 
		r_cycle_end<=0;

always @*
	if (correct_enable==1'b1 && cc_256_16==1 && light_adj_mode==0 && l_num_128_en==1 && h_out_en==1 && pixel_addr==10'h7f && r_color_end==1)
		h_out_end<=1;
	else if (h_out_en==1 && r_cycle_end==1 && r_base_end==1 && r_color_end==1)
		h_out_end<=1;
	else
		h_out_end<=0;

//***********************************************************/
//			输出信号地址生成
//***********************************************************/
//列控时r_cycle_count是单元计数也是端口计数

always @(posedge sclk)    
        if((port_20_en==1 || port_24_en==1) && l_mode==1)
                unit_num<={lmode_r_port_count[4:1],lmode_r_port_count[0]+(p_ex_flag&l_mode)};
	else        
	        unit_num<={r_cycle_count[6:1],r_cycle_count[0]+(p_ex_flag&l_mode)};

always @(posedge sclk) begin
	pixel_offset_t<=r_base_count;
	pixel_offset<=pixel_offset_t;
	end

always @*
	pixel_addr<=unit_pixel_base+pixel_offset;

always @(posedge sclk) begin
	r_color_addr_t<=r_color_count;
	r_color_addr<=r_color_addr_t;
	end

always @(posedge sclk)
	if (vir_mode==0)
		color_sel<=r_color_addr_t;
	else 
		case(r_color_addr_t)
			0:	color_sel<=led_set[1:0];
			1:	color_sel<=led_set[5:4];
			2:	color_sel<=led_set[3:2];
			3:	color_sel<=led_set[7:6];
		endcase

//************行缓冲读信号**************
always @*
	if (color2_pixel==0)
		dis_buf_raddr<={pixel_addr[9:0],r_color_addr[1:0]};
	else
		dis_buf_raddr<={pixel_addr[9:0],pixel_addr[10],r_color_addr[0]};

//**********调整数据缓冲读信号**********
always @(posedge sclk)
begin
        pixel_addr_r<=pixel_addr[7:0];
        pixel_addr_r1<=pixel_addr_r;
end

always @(posedge sclk)
        if(light_adj_mode==1)
                adjust_addr<={pixel_addr_r[7:0],color_sel_r[1:0]};
        else              
                adjust_addr<={pixel_addr_r1[7:0],color_sel_r1[1:0]};

//******************************************************************/
//			   数据处理
//******************************************************************/
//************灰度映射表读**************
always @*
        if(local_picture_en==0)
                table_addrb<={2'b00,dis_buf_rdata};
        else
                table_addrb<={2'b00,adjust_data[14:7]};                                                

assign	gray_data = table_addrb;
	
//************逐点分色数据**************
always @*
	dot_color_light <= gamma_light[15:0];

always@(posedge sclk)
begin
        color_sel_r<=color_sel;
        color_sel_r1<=color_sel_r;
        color_sel_r2<=color_sel_r1;
end  

assign  Kr=(local_picture_en==1||correct_enable==0)? 16'h8000:adjust_data[15:0]; 
assign  Kg=(light_adj_mode==1 || correct_enable==0)? 16'h0000:adjust_data[31:16]; 
assign  Kb=(light_adj_mode==1 || correct_enable==0)? 16'h0000:adjust_data[47:32]; 

always @(posedge sclk)
        if(color_sel_r1==0 || light_adj_mode==1 ||correct_enable==0)
                dR<=dot_color_light;

always @(posedge sclk)
        if(color_sel_r1==1)
                dG<=dot_color_light;

always @(posedge sclk)
        if(color_sel_r1==2 || light_adj_mode==1 ||correct_enable==0) begin
                R<=dR;
                G<=dG;
                B<=dot_color_light;                
        end
        
mult_16_16_sync	dot_color_mult_r (
	.clock ( sclk ),
	.dataa ( Kr[15:0] ),
	.datab ( R ),
	.result ( R1 )
	);

mult_16_16_sync	dot_color_mult_g (
	.clock ( sclk ),
	.dataa ( Kg[15:0] ),
	.datab ( G ),
	.result ( G1 )
	);

mult_16_16_sync	dot_color_mult_b (
	.clock ( sclk ),
	.dataa ( Kb[15:0] ),
	.datab ( B ),
	.result ( B1 )
	);
	
always@(posedge sclk)
        dout_c<=R1[30:13]+G1[30:13]+B1[30:13];  

always@(posedge sclk)
        dout_d<=dout_c[18:2]+dout_c[1]; 
        		
//************箱体分色**************
always @(posedge sclk)
        if(dout_d[17:0]>max_light) 
                unit_color_light<=max_light;
        else
                unit_color_light<=dout_d[15:0];
	
always	@(posedge sclk) begin
	color_sel_r3<=color_sel_r2;
	color_sel_r4<=color_sel_r3; 
        color_sel_r5<=color_sel_r4;
        color_sel_r6<=color_sel_r5;       	        
	end

always	@(posedge sclk)
        if(local_picture_en==1)
                unit_color_addr=color_sel_r6;
        else if((correct_enable==1 && lc_256_8==1)||correct_enable==0)
                unit_color_addr=color_sel_r3;
        else if(correct_enable==1)
                unit_color_addr=color_sel_r4; 

//******************************************************************/
//			   gamma调整
//******************************************************************/
always @*
	if (h_out_en == 1'b1 && hs_shift[0] == 1'b0)
		hout_st_temp <= 1;
	else
		hout_st_temp <= 0;

always @(posedge sclk)
	d_start <= r_color_end;

always @(posedge sclk)
	start_shift <= {start_shift[10:0], hout_st_temp | d_start};

// for timming
always @(posedge sclk)
        gray_data_d1<=gray_data;        

always @(posedge sclk)
	if (start_shift[3] == 1)
		gray_temp<=gray_data_d1;
	else if (gray_data_d1 > gray_temp)
		gray_temp<=gray_data_d1;

always @(posedge sclk)
	if (start_shift[5] == 1) begin
		if (gray_data_d1 > gray_temp)
			gray_max_temp <= gray_data_d1;
		else
			gray_max_temp <= gray_temp;
		end

always @(posedge sclk)
        if(start_shift[7] == 1)
                gray_max_d1<=gray_max_temp;

always @(posedge sclk)
                gray_max_d2<=gray_max_d1;

always @(posedge sclk)
        if(start_shift[10] == 1)
                gray_max_dd<=gray_max_d1;

always @(posedge sclk)
        if(local_picture_en==1)
                gray_max<=gray_max_dd;
        else if((correct_enable==1 && lc_256_8==1) || correct_enable==0)
                gray_max<=gray_max_d1;        
        else if(correct_enable==1)
                gray_max<=gray_max_d2;
                
always @(posedge sclk)
        unit_color_data<=unit_color_result[30:15];
//******************************************************************/
//			   数据输出
//******************************************************************/
always	@(posedge sclk)
	hs_shift<={hs_shift[14:0],h_out_en};
             
always @(posedge sclk)
        if(local_picture_en==1)
                hsout<=hs_shift[15];
        else if((correct_enable==1 && lc_256_8==1)||correct_enable==0)
                hsout<=hs_shift[12];
        else if(correct_enable==1)
                hsout<=hs_shift[13];               

always @(posedge sclk)
        if(data_inv_en==1'b1)
                dout<=~gamma_result[23:8]; 
        else
                dout<=gamma_result[23:8]; 
        
always	@(posedge sclk)
        if((mode_port_free==1'b0 && down_in==1'b1) || (mode_port_free==1'b1 && empty_down==1'b0))
                box_empty_h<=box_h_pixel-h_total_reg[8:0];
        else
                box_empty_h<=8'h0;                      

always	@(posedge sclk)
	if (hs_vir==1 && hsin_t==0)
                adj_h_num<=h_num+box_empty_h;
                
always	@(posedge sclk)
	if (hs_vir==0 && hsin_t==1)
		h_num_out<=adj_h_num;
		
always @(posedge sclk)
        if(hsin_t==1 && hs_vir==0 && correct_enable==1'b1 && l_num_128_en==1 && cc_256_16==1)
                cc_256_16_pre_128p<=1;
        else if(hsout_r==1 && hsout==0)
                cc_256_16_pre_128p<=0; 
                
always	@(posedge sclk)
        hsout_r<=hsout;

always	@*	
        if(hsout_r==0 && hsout==1) begin
                if(correct_enable==1'b1 && cc_256_16==1 && cc_256_16_pre_128p==0) 	
                        h_start<=0;
                else
                        h_start<=1;
                end
        else
                h_start<=0;	

always	@*	
        if(hsout_r==1 && hsout==0 && cc_256_16_pre_128p==0)		
                h_end<=1;
        else
                h_end<=0;
                        		
//******************************************************************/
//			   测试输出
//******************************************************************/
assign	tout={correct_type,correct_en,dot_adj_frame,adj_rd_start2,cc_256_16};

endmodule